Bridging Quantization and Deployment: A Fixed-Point Workflow for FPGA Accelerators

Obed M. Mogaka; Håkan Forsberg; Masoud Daneshtalab; Obed M. Mogaka; Rami Zewail; Koji Inoue; Mohammed S. Sayed; Obed M. Mogaka

doi:10.1109/DDECS63720.2025.11006791

Showing 3 of 3 publications

2025

DDECS
Bridging Quantization and Deployment: A Fixed-Point Workflow for FPGA Accelerators
Obed M. Mogaka, Håkan Forsberg, Masoud Daneshtalab
Proceedings of the 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2025
DOI Details
We present a fixed-point quantization-to-deployment workflow that automates the precision-selection and hardware generation steps for deep learning accelerators on FPGAs, closing the gap between post-training quantization research and practical synthesis-ready RTL.
```
@inproceedings{mogaka2025ddecs,
  author = {Mogaka, Obed M. and Forsberg, Håkan and Daneshtalab, Masoud},
  title = {Bridging Quantization and Deployment: A Fixed-Point Workflow for {FPGA} Accelerators},
  booktitle = {Proceedings of the 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)},
  year = {2025},
  pages = {123--126},
  doi = {10.1109/DDECS63720.2025.11006791},
  keywords = {FPGA, quantization, deep learning, hardware accelerator, fixed-point}
}
```

2024

JRTIP
TinyEmergencyNet: A hardware-friendly ultra-lightweight deep learning model for aerial scene image classification
Obed M. Mogaka, Rami Zewail, Koji Inoue, , and 1 more author
Journal of Real-Time Image Processing, 2024
DOI Details
We propose TinyEmergencyNet, an ultra-lightweight convolutional neural network designed for real-time aerial scene classification on resource-constrained hardware. The architecture achieves competitive accuracy with a fraction of the parameters and multiply-accumulate operations of standard models, making it suitable for deployment on embedded and FPGA platforms.
```
@article{mogaka2024tiny,
  author = {Mogaka, Obed M. and Zewail, Rami and Inoue, Koji and Sayed, Mohammed S.},
  title = {{TinyEmergencyNet}: A hardware-friendly ultra-lightweight deep learning model
                  for aerial scene image classification},
  journal = {Journal of Real-Time Image Processing},
  volume = {21},
  number = {2},
  pages = {51},
  year = {2024},
  doi = {10.1007/s11554-024-01430-y},
  keywords = {deep learning, aerial scene classification, lightweight CNN, FPGA, embedded ML}
}
```
Thesis
An FPGA-Based Deep Learning Accelerator for Remote Sensing Applications
Obed M. Mogaka
2024
Details
This thesis designs and implements an FPGA-based hardware accelerator for deep learning inference targeting remote sensing image classification tasks. The work covers architecture exploration, fixed-point quantization, HLS synthesis, and FPGA deployment evaluation.
```
@mastersthesis{mogaka2024thesis,
  author = {Mogaka, Obed M.},
  title = {An {FPGA}-Based Deep Learning Accelerator for Remote Sensing Applications},
  school = {Egypt-Japan University of Science and Technology (E-JUST)},
  year = {2024},
  type = {M.Sc.\ Thesis},
  keywords = {FPGA, deep learning accelerator, remote sensing, HLS, quantization}
}
```