01 research Research system
TileCNN
A reproducible model-to-FPGA framework for running different quantized CNNs on one reusable INT8 accelerator, without rebuilding the FPGA for each network.
Research & Projects
Research systems and engineering projects spanning FPGA acceleration, efficient AI, embedded firmware, and custom hardware.
01
Methods, models, and accelerator architectures for efficient edge intelligence.
01 research Research system
A reproducible model-to-FPGA framework for running different quantized CNNs on one reusable INT8 accelerator, without rebuilding the FPGA for each network.
02 research Research system
Fixed-point quantization for CNNs that must run bit-exactly on FPGA accelerators, from quantization-aware training to a verified deployment package.
Research system
A hardware-friendly ultra-lightweight CNN for real-time aerial scene classification on resource-constrained platforms.
02
Boards, firmware, and practical systems taken from design files to working hardware.
04 engineering Engineering build
A custom educational development board designed around the ATmega2560, from schematic and PCB layout to firmware and assembly.
Engineering build
A custom STM32F407 development board with complete design documents, manufacturing files, and hardware release artifacts.
Engineering build
Register-level peripheral drivers for STM32F103 microcontrollers, tested on the STM32F103C8T6 platform.